HY57V653220B

HY57V653220B, Synchronous DRAM, 1 W, 50 mA, 4.6 V, TSOP

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Price:: US $1.90~2.00 / piece [Get Latest Price]

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Qty (lots)	Price/lot
1 ~ 10 :	2.00 / Piece
20 ~ 100 :	1.90 / Piece

PartNumber:: HY57V653220B

Brand:: Hynix Semiconductor - Hynix | Pack: TSOP | D/C: 08+

Availability:: Supply Ability: 1/Month Can Ship Immediately
Delivery: 10-15 Business Days (ships out within 3 Business days)

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Products Upload time: 2013-07-29

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Part Number:HY57V653220B
US $1.90 - 2.00
Quantity:

piece

Product Summary

The HY57V653220B is a 67,108,864-bit CMOS Synchronous DRAM, ideally suited for the memory applications which require wide data I/O and high bandwidth. The HY57V653220B is organized as 4banks of 524,288x32. The HY57V653220B is offering fully synchronous operation referenced to a positive edge of the clock. All inputs and outputs are synchronized with the rising edge of the clock input. The data paths are internally pipelined to achieve very high bandwidth. All input and output voltage levels are compatible with LVTTL.

Parametrics

HY57V653220B absolute maximum ratings: (1)Ambient Temperature TA: 0 ~ 70 °C; (2)Storage Temperature TSTG: -55 ~ 125 °C; (3)Voltage on Any Pin relative to VSS VIN, VOUT: -1.0 ~ 4.6 V; (4)Voltage on VDD relative to VSS VDD, VDDQ: -1.0 ~ 4.6 V; (5)Short Circuit Output Current IOS: 50 mA; (6)Power Dissipation PD: 1 W; (7)Soldering Temperature ⋅ Time TSOLDER: 260 .10 °C.Sec.

Features

HY57V653220B features: (1)JEDEC standard 3.3V power supply; (2)All device pins are compatible with LVTTL interface; (3)JEDEC standard 400mil 86pin TSOP-II with 0.5mm of pin pitch; (4)All inputs and outputs referenced to positive edge of system clock; (5)Data mask function by DQM0,1,2 and 3; (6)Internal four banks operation; (7)Auto refresh and self refresh; (8)4096 refresh cycles / 64ms; (9)Programmable Burst Length and Burst Type:; (10)1, 2, 4, 8 or full page for Sequential Burst;; (11)1, 2, 4 or 8 for Interleave Burst; (12)Programmable CAS Latency; 2, 3 Clocks; (13)Burst Read Single Write operation.