(China (Mainland))
Product Summary
The AM29F200BB-70EC is a 2Mbit, 5.0 Volt-only Flash memory organized as 262,144 bytes or 131,072 words. The 8 bits of data appear on DQ0-DQ7; the 16 bits on DQ0-DQ15. The AM29F200BB-70EC is offered in 44-pin SO and 48-pin TSOP packages. The device is also available in Known Good Die (KGD) form. It is designed to be programmed in-system with the standard system 5.0 volt VCC supply. A 12.0 volt VPP is not required for program or erases operations. The AM29F200BB-70EC can also be reprogrammed in standard EPROM programmers.
Parametrics
AM29F200BB-70EC absolute maximum ratings: (1)Storage Temperature Plastic Packages:–65℃ to +150℃; (2)Ambient Temperature with Power Applied:–55℃ to +125℃; (3)Voltage with Respect to Ground: VCC:–2.0 V to +7.0 V, A9, OE#, and RESET#:–2.0 V to +12.5 V, All other pins:–0.5 V to +7.0 V; (4) Output Short Circuit Current: 200mA.
Features
AM29F200BB-70EC features: (1)5.0 V for read and write operations: Minimizes system level power requirements; (2)High performance: Access times as fast as 45 ns; (3)Low power consumption: 20mA typical active read current (byte mode), 28mA typical active read current for (word mode), 30mA typical program/erase current, 1μA typical standby current; (4)One 16Kbyte, two 8Kbyte, one 32Kbyte, and three 64Kbyte sectors (byte mode); (5)One 8Kword, two 4Kword, one 16Kword, and three 32Kword sectors (word mode); (6)Supports full chip erase; (7)Top or bottom boot block configurations available; (8)Minimum 100,000 write/erase cycles guaranteed; (9)Package options: 44-pin SO, 48-pin TSOP, Known Good Die (KGD); (10)Compatible with JEDEC standards: Pin out and software compatible with single-power-supply flash, Superior inadvertent write protection; (11)Data# Polling and Toggle Bit: Detects program or erase cycle completion; (12)Ready/Busy# output (RY/BY#): Hardware method for detection of program or erase cycle completion; (13)Erase Suspend/Erase Resume: Supports reading data from a sector not being erased; (14)Hardware RESET# pin: Resets internal state machine to the reading array data.
Diagrams
