Product Summary

The K4S561632D-TC75 is a 268,435,456 bits synchronous high data rate Dynamic RAM organized as 4 x 4,196,304 words by 16 bits, fabricated with SAMSUNG’s high performance CMOS technology. Synchronous design allows precise cycle control with the use of system clock I/O transactions are possible on every clock cycle. Range of operating frequencies, programmable burst length and programmable latencies allow the K4S561632D-TC75 to be useful for a variety of high bandwidth, high performance memory system applications.

Parametrics

K4S561632D-TC75 absolute maximum ratings: (1)Voltage on any pin relative to Vss: VIN, VOUT: -1.0 ~ 4.6 V; (2)Voltage on VDD supply relative to Vss: VDD, VDDQ: -1.0 ~ 4.6 V; (3)Storage temperature: TSTG: -55 ~ +150 °C; (4)Power dissipation: PD: 1 W; (5)Short circuit current: IOS: 50 mA.

Features

K4S561632D-TC75 features: (1)JEDEC standard 3.3V power supply; (2)LVTTL compatible with multiplexed address; (3)Four banks operation; (4)MRS cycle with address key programs: CAS latency (2 & 3), Burst length (1, 2, 4, 8 & Full page), Burst type (Sequential & Interleave); (5)All inputs are sampled at the positive going edge of the system clock; (6)Burst read single-bit write operation; (7)DQM (x4,x8)& L(U)DQM (x16)for masking; (8)Auto & self refresh; (9)64ms refresh period (4K Cycle).

Diagrams

K4S561632D-TC75 block diagram