Product Summary

The IC42S16100-7T 16Mb Synchronous DRAM is organized as a 524,288-word x 16-bit x 2-bank for improved performance. The IC42S16100-7T achieves high-speed data transfer using pipeline architecture. All inputs and outputs signals refer to the rising edge of the clock input.

Parametrics

IC42S16100-7T absolute maximum ratings: (1)Maximum Supply Voltage: –1.0 to +4.6 V; (2)MAX Maximum Supply Voltage for Output Buffer: –1.0 to +4.6 V; (3)Input Voltage: –1.0 to +4.6 V; (4)Output Voltage: –1.0 to +4.6 V; (5)MAX Allowable Power Dissipation: 1 W; (6)Output Shorted Current: 50 mA; (7)Operating Temperature: 0 to +70 °C; (8)Storage Temperature: –55 to +150 °C.

Features

IC42S16100-7T features: (1)Clock frequency: 200, 166, 143 MHz; (2)Fully synchronous; all signals referenced to a positive clock edge; (3)Two banks can be operated simultaneously and independently; (4)Dual internal bank controlled by A11 (bank select); (5)Single 3.3V power supply; (6)LVTTL interface; (7)Programmable burst length– (1, 2, 4, 8, full page); (8)Programmable burst sequence: Sequential/Interleave; (9)Auto refresh, self refresh; (10)4096 refresh cycles every 64 ms; (11)Random column address every clock cycle; (12)Programmable CAS latency (2, 3 clocks); (13)Burst read/write and burst read/single write operations capability; (14)Burst termination by burst stop and precharge command; (15)Byte controlled by LDQM and UDQM; (16)Package 400mil 50-pin TSOP-2; (17)Pb(lead)-free package is available.

Diagrams

IC42S16100-7T block diagram