Product Summary

The D2508AETA-6B is a 256M bits DDR SDRAM.

Parametrics

D2508AETA-6B absolute maximum ratings: (1)Voltage on any pin relative to VSS VT: -1.0 to +3.6 V; (2)Supply voltage relative to VSS VDD: -1.0 to +3.6 V; (3)Short circuit output current IOS: 50 mA; (4)Power dissipation PD: 1.0 W; (5)Operating ambient temperature TA: 0 to +70 °C; (6)Storage temperature Tstg: -55 to +125 °C.

Features

D2508AETA-6B features: (1)Double-data-rate architecture; two data transfers per clock cycle; (2)The high-speed data transfer is realized by the 2 bits prefetch pipelined architecture; (3)Bi-directional data strobe (DQS)is transmitted /received with data for capturing data at the receiver; (4)Data inputs, outputs, and DM are synchronized with DQS; (5)DQS is edge-aligned with data for READs; centeraligned with data for WRITEs; (6)Differential clock inputs (CK and /CK); (7)DLL aligns DQ and DQS transitions with CK transitions; (8)Commands entered on each positive CK edge; data and data mask referenced to both edges of DQS; (9)Data mask (DM)for write data.

Diagrams

D2508AETA-6B pin connection