Product Summary

The K4D261638K-LC50 is a 134,217,728 bits of hyper synchronous data rate dynamic RAM organized as 4 x 2,097,152 words by 16 bits, fabricated with SAMSUNG high performance CMOS technology. Synchronous features with data strobe allow extremely high performance up to 1.6GB/s/chip. I/O transactions are possible on both edges of the clock cycle. Range of operating frequencies, programmable burst length and programmable latencies allow the device to be useful for a variety of high performance memory system applications.

Parametrics

K4D261638K-LC50 absolute maximum ratings: (1)Voltage on any pin relative to Vss VIN, VOUT: -0.5 ~ 3.6 V; (2)Voltage on VDD supply relative to Vss VDD: -1.0 ~ 3.6 V; (3)Voltage on VDD supply relative to Vss VDDQ: -0.5 ~ 3.6 V; (4)Storage temperature TSTG: -55 ~ +150 °C; (5)Power dissipation PD: 2.0 W; (6)Short circuit current IOS: 50 mA.

Features

K4D261638K-LC50 features: (1)2.5V + 5% power supply for device operation; (2)2.5V + 5% power supply for I/O interface; (3)SSTL_2 compatible inputs/outputs; (4)4 banks operation; (5)MRS cycle with address key programs: Read latency 3, 4 and 5(clock); Burst length (2, 4 and 8); Burst type (sequential & interleave); (6)All inputs except data & DM are sampled at the positive going edge of the system clock; (7)Differential clock input; (8)No Wrtie-Interrupted by Read Function; (9)Data I/O transactions on both edges of Data strobe; (10)DLL aligns DQ and DQS transitions with Clock transition; (11)Edge aligned data & data strobe output; (12)Center aligned data & data strobe input; (13)DM for write masking only; (14)Auto & Self refresh; (15)32ms refresh period (4K cycle); (16)66pin TSOP-II; (17)Maximum clock frequency up to 400MHz; (18)Maximum data rate up to 800Mbps/pin.

Diagrams

K4D261638K-LC50 pin connection